Important Turning Point in Transistor Technology
In 1947, the first transistor was demonstrated at Bell Laboratories. Silicon was first used to produce bipolar transistors in 1954, but it was not until 1960 that the first silicon metal oxide semiconductor field-effect transistor (MOSFET) was built. The earliest MOSFETs were 2D planar devices with current flowing along the surface of the silicon under the gate. The basic structure of MOSFET devices has remained substantially unchanged for over 50 years.
Continued optimization and manufacturability studies on 3-D transistor structures was on at research and development organizations in leading semiconductor companies. Some of the process and patent development has been published and publicly shared, and some remained in corporate labs. The International Technology Roadmap for Semiconductors (ITRS) drives the research investment interests of the semiconductor industry, which is coordinated and published by a consortium of manufacturers, suppliers, and research institutes.
The ITRS defines transistor technology requirements to achieve continued improvement in performance, power, and density along with options which should be explored to achieve the goals. The ITRS and its public documentation captures conclusions and recommendations regarding manufacturing capabilities like strained silicon and High-K metal gate, and now the use of 3-D transistor technologies to maintain the benefits of Moore’s law. Based on documents produced by the ITRS and an examination of academic papers and patent filings, research into 3-D transistor technologies has grown dramatically in the last decade.
The Triggers That Threw Spotlight on 3-D Transistors
Two important pronouncements that have occurred in the last two years that have propelled the 3-D transistor structure into the industry spotlight, and into a permanent place in the technology story of MOSFET transistors are 1) The first announcement by Intel Corporation on 4th of May, 2011, about their Tri-Gate transistor design that had been selected for the design and manufacture of their 22 nm semiconductor products. 2) The second announcement was the publication of ITRS technology roadmaps, with contributions from many other semiconductor manufacturing companies that identified 3-D transistor technology as the primary enabler of all incremental semiconductor improvement beyond the 20 nm or 22 nm design node.
So Exactly How Small is 20 nano-meter?
Each and every micro-processor manufactured today is made of millions, or even billions, of tiny electrical components called transistors. Over time, in accordance with Moore's law, transistors have been getting smaller and smaller and because of which, computing and communication devices continue to get smarter, faster and highly efficient.
Intel believes that keeping up with Moore's Law has never been exactly easy. Especially for 22 nanometers, Intel claims that it became clear early on that continued shrinking was not going to give the expected benefits without some radical redesign. After a decade of research and development, taking advantage of the work of Hisamoto and others in FinFET development and optimization, Intel invented the solution. For the first time in history, the transistor has officially entered the 3rd dimension. Image 1 shows what a 3D transistor looks like.
Image 1: A 3D transistor chip
But first, what are 2-D transistors?
Image 2: Traditional Planar 2-D Transistor
Now Coming to 3-D Transistors...
Image 3: 22nm Trigate Transistor
Image 4: 22nm Trigate Transistor
Image 5: Tri-Gate transistors with multiple fins
The 3-D geometry and structure of the Tri-Gate transistor provides a host of important improvements over the planar transistor structure, all related to the ‘wrap-around’ effect of the MOSFET ‘gate’ around the source-to-drain ‘channel.’ These advantages manifest in improved performance, reduced active and leakage power, transistor design density, and a reduction in transistor susceptibility to charged particle single event upsets (SEU).
The power advantage results from the improved control of the channel by the gate’s electric field on three sides of the fin. As explained by Intel Corporation at their Intel Developer Forums (2011, 2012), this power advantage is created by an effectively steeper transistor voltage curve for Tri-Gate transistors. Transistor designers can take advantage of this steeper curve with either a significant reduction in leakage current for the same performance of a planar transistor, or substantially higher performance (transistor operation speed), or a combination of both.
The Real Advantage of Tri-Gate Transistors
·More than 50% power reduction at constant performance.
·37% performance increase at low voltage.
·Improved performance and efficiency.
"For years we have seen limits to how small transistors can get," said Gordon E. Moore. "This change in the basic structure is a truly revolutionary approach, and one that should allow Moore's Law, and the historic pace of innovation, to continue." - Gordon E. Moore
"The performance gains and power savings of Intel's unique 3-D Tri-Gate transistors are like nothing we've seen before. This milestone is going further than simply keeping up with Moore's Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry." - Mark Bohr, Intel Senior Fellow
|FUN FACTS: EXACTLY HOW SMALL (AND COOL) IS 22 NANOMETERS?|
|The original transistor built by Bell Labs in 1947 was large enough that it was pieced together by hand. By contrast, more than 100 million 22nm tri-gate transistors could fit onto the head of a pin*.
More than 6 million 22nm tri-gate transistors could fit in the period# at the end of this sentence.
A 22nm tri-gate transistor's gates that are so small, you could fit more than 4000 of them across the width of a human hair^.
If a typical house shrunk as transistors have, you would not be able to see a house without a microscope. To see a 22nm feature with the naked eye, you would have to enlarge a chip to be larger than a house. (4)
Compared to Intel's first microprocessor, the 4004, introduced in 1971, a 22nm CPU runs over 4000 times as fast and each transistor uses about 5000 times less energy. The price per transistor has dropped by a factor of about 50,000.
A 22nm transistor can switch on and off well over 100 billion times in one second. It would take you around 2000 years to flick a light switch on and off that many times**.
It's one thing to design a tri-gate transistor but quite another to get it into high volume manufacturing. Intel's factories produce over 5 billion transistors every second. That's 150,000,000,000,000,000 transistors per year, the equivalent of over 20 million transistors for every man, woman and child on earth.
*A pin head is about 1.5 mm in diameter.
#A period is estimated to be 1/10 square millimeter in area.
^A human hair is about 90 microns in diameter.
(4)The smallest feature visible to the naked eye is 40 microns.
**Assumes a person can flick a light switch on and off 150 times per minute.
Table Courtesy – Intel's Press Material on 22 nm 3-D transistor technology
Tri-Gate Devices Now in Production
Image 6: 22nm Manufacturing Fabs
Image 7: Gates and Fins of 22 nm 3-D transistor
Impact on FPGA and Other Semiconductor Device Performance
Let's see how this three dimensional technology will provide a significant boost in the capabilities of high-performance programmable logic.
The primary advantage of Tri-Gate technology to FPGA-based electronic product designer is the continuation of Moore’s Law in the steady march of improvements in transistor density, performance, power, and cost-per-transistor. This sustains an industry of consumer electronics, computing platform development, software complexity advances, memory and storage growth, mobile device creativity and development, and business automation and productivity.In addition, control over the static and active power dissipation of semiconductors improves tremendously with this technology. For users of FPGAs, this makes programmable logic that advances to 14 nm technology and beyond both power competitive with ASIC and ASSP design solutions on available competing design nodes, with even more significant advantages in programmability, performance, flexibility, Open Computing Language (OpenCL™) software design entry, and integration of DSP, transceiver, hardened processor, and configurable I/Os.